1. Field of the Invention
The present invention relates to semiconductor structures and methods of forming semiconductor structures, and more particularly to image sensors and methods of fabricating image sensors.
2. Description of the Related Art
With advances associated with electronic products, semiconductor technology has been widely applied in manufacturing memories, central processing units (CPUs), liquid crystal displays (LCDs), light emission diodes (LEDs), laser diodes and other devices or chip sets. Further, integrated circuits providing various functions have been assembled or integrated to efficiently serve multiple functions in a single chip. This type of integrated circuit is generally referred to as a “system on chip (SOC).” A complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) is one type of SOC. A CIS includes a CMOS transistor, a color filter, and a photo diode. The photo diode is subjected to a light exposure which generates electron and hole charges. The color filter transmits light in the three primary colors (red, green and blue) to respective detector elements. Voltages are applied to the CMOS transistor, thereby directing the charges generated by the photoelectric effect to a capacitor.
In order to achieve high-integration and high-speed goals, dimensions of semiconductor integrated circuits continue to shrink. Various materials and techniques have been proposed to achieve these integration and speed goals and to overcome manufacturing obstacles associated therewith. In order to reduce resistances of the CMOS transistor, silicide has been formed over the top surface of the transistor gate and source/drain regions. The photo diode coupled to the transistor, however, must be protected from the silicide formation because a silicide layer formed over the photo diode will block the photo diode from a light exposure and adversely affect the photoelectric effect. Accordingly, a resist protection oxide (RPO) layer is formed over the photo diode to protect the photo diode from silicide formation.
FIG. 1A is a cross-sectional view showing a prior art CIS diode. A shallow trench isolation (STI) structure 105 is formed within the substrate 100. The CIS diode comprises a CMOS transistor 107 and a photo diode 130. The CMOS transistor 107 includes a gate oxide layer 109, polysilicon gate 110 and cobalt silicide layer 150 sequentially formed over the substrate 100. The CMOS transistor 107 further includes spacers 115 formed on the sidewalls of the polysilicon gate 110 and a source/drain region 120 formed within the substrate 100 adjacent to the polysilicon gate 110. A silicide layer 155 is formed over the source/drain region 120. The photo diode 130 comprises a p+-type dopant region 135 and an n-type dopant region 137. When the photo diode 130 is subjected to a light exposure 150, the photoelectric effect occurs and electrons and holes (not shown) are generated within the photo diodes. An RPO layer 140 is formed over the photo diode 130 for protecting the photo diode 130 from being silicidized when the silicide layers 150 and 155 are formed over the polysilicon gate 110 and source/drain region 120, respectively.
In a prior art process step, the RPO layer 140 is formed by a chemical vapor deposition (CVD) process step using silane (SiH4) and N2O as precursors. The CVD process step has an oxide deposition rate of about 40 Å/sec or more. However, white pixels of photo diodes can be found when undesired charges or current leakages are found in the photo diodes. The white pixel failures relate to the structures or film quality of the CIS diode. It may also relate to films covering the CIS diode or process steps performed after the photo diode 130 is formed.
From the foregoing, improved image sensors and methods of forming image sensors are desired.